JFET transistors generally offer a low electrical noise at the output, and generally have a good high voltage performance. For example, JFET transistors are found in the input stages of precision operational amplifiers with a high input impedance.
Bipolar transistors exhibit a high gain, a high output impedance, and offer good performance at high frequencies, which allows them to be advantageously used for example in high-frequency analog amplifiers.
On the other hand, MOS transistors, fabricated using a CMOS technology, generally exhibit a high input impedance and are notably used in logic circuits for digital electronics.
BiCMOS technology offers the advantages of the two types of technologies (bipolar and CMOS), and is advantageously used for applications with mixed signals (analog and digital).
However, the methods for fabricating electronic circuits of the BiCMOS type must satisfy the production constraints of both bipolar and CMOS technologies, notably owing to the different individual steps between the two technologies.
Currently, the integration of JFET transistors into a BiCMOS integrated circuit involves the introduction of additional steps into fabrication methods already subject to significant constraints, leading to drawbacks of cost.
Furthermore, the current JFET transistors are planar, having lateral junctions.
The pinch voltage of a JFET transistor is directly dependent on the geometry of the junction, and is notably determined by the critical dimension of the active surface of the channel.
The channel region of a planar JFET transistor is commonly formed by interleaved layers of doped semiconductor materials, forming an arrangement of the source, gate and drain regions of the JFET transistor.
Thus, the size of the channel of a planar JFET transistor, notably its critical dimension of active surface, is determined by diffusions of dopants and is consequently difficult to control and adjust.
Furthermore, within the same process for production of planar JFET transistors, forming JFET transistors having pinch voltages that are different from one another requires additional masking and implantation steps.